Design Verification Engineer H-1B salary at Cirrus Logic International Semiconductor — 82 certified filings (FY2019–FY2026)
- 7
- Filings · FY2025
- $144k
- Median base · FY2025
- $142k–$178k
- Middle 50% · FY2025
- −9%
- vs market median · all years
Cirrus Logic International Semiconductor filed 7 certified H-1B LCAs for Design Verification Engineer in FY2025, with a median base salary of $144k and the middle 50% of offers between $142k and $178k. Across all years its $128k median is 9% below the $142k market median for Design Verification Engineer. It has filed 82 Design Verification Engineer LCAs since FY2019, most often in Austin, TX.
How much does Cirrus Logic International Semiconductor pay a Design Verification Engineer?
Certified base salary for Design Verification Engineer at Cirrus Logic International Semiconductor by fiscal year: each box is the p25–p75 range, the heavy line the median, the whiskers reach p10–p90. $144k median in FY2025. Base pay only — hover a year for its figures.
Does Cirrus Logic International Semiconductor pay Design Verification Engineers above the market?
Cirrus Logic International Semiconductor's all-years median against every employer's certified Design Verification Engineer LCAs — 9% below the market. Same cleaned DOL title, same base-salary definition, so the two rows compare like for like.
| Base salary for this title | Filings | Median |
|---|---|---|
| Cirrus Logic International Semiconductor | 82 | $128k |
| All employers · Design Verification Engineer | 1,200 | $142k |
How has Cirrus Logic International Semiconductor's Design Verification Engineer hiring changed by year?
8 certified Design Verification Engineer filings in FY2019 → 12 in FY2026. The change column is each year against the one before.
| Fiscal year | Filings | vs prior FY | Median base |
|---|---|---|---|
| FY2026 | 12 | +71% | $146k |
| FY2025 | 7 | −30% | $144k |
| FY2024 | 10 | −17% | $125k |
| FY2023 | 12 | +50% | $135k |
| FY2022 | 8 | +14% | $130k |
| FY2021 | 7 | −61% | $125k |
| FY2020 | 18 | +125% | $102k |
| FY2019 | 8 | — | $100k |
Which wage levels does Cirrus Logic International Semiconductor file for Design Verification Engineer?
DOL prevailing-wage levels I–IV approximate experience tiers (I = entry, IV = fully competent). 36% of Cirrus Logic International Semiconductor's Design Verification Engineer filings sit at Level III–IV. Higher levels earn more entries in the wage-weighted H-1B lottery.
Share of 50 Design Verification Engineer filings with a wage level · all years
- Level II64.0%32
- Level III2.0%1
- Level IV34.0%17
Where does Cirrus Logic International Semiconductor hire H-1B Design Verification Engineers?
Worksite states and cities on the certified filings for this title, all years, with the median base salary at each.
| State | Filings | Median base |
|---|---|---|
| Texas | 74 | $128k |
| Arizona | 8 | $120k |
| City | Filings | Median base |
|---|---|---|
| Austin, TX | 74 | $128k |
| Chandler, AZ | 5 | $133k |
| Mesa, AZ | 3 | $112k |
Also filed as
Cirrus Logic International Semiconductor's other sponsored titles, and the employers that file the most Design Verification Engineer LCAs. All years.
Other titles at Cirrus Logic International Semiconductor
| Job title | Filings | Median base |
|---|---|---|
| Design Engineer | 95 | $144k |
| Analog Design Engineer | 50 | $155k |
| Physical Design Engineer | 33 | $150k |
Top Design Verification Engineer sponsors
| Employer | Filings | Median base |
|---|---|---|
| Apple | 409 | $155k |
| Microsoft | 166 | $130k |
| Meta Platforms | 71 | $199k |
| Texas Instruments | 58 | $119k |
| 40 | $168k | |
| Synapse Design Automation | 35 | $130k |
| Micron Technology | 28 | $115k |
| Analog Devices | 20 | $89k |
| Enfabrica | 15 | $220k |
Common questions about Design Verification Engineer H-1B pay at Cirrus Logic International Semiconductor
- How much does Cirrus Logic International Semiconductor pay a Design Verification Engineer on an H-1B?
- Cirrus Logic International Semiconductor's median certified H-1B base salary for Design Verification Engineer is $144k in FY2025, from 7 filings; the middle 50% of offers fall between $142k and $178k. Across all years the median is $128k.
- How many Design Verification Engineer H-1B LCAs has Cirrus Logic International Semiconductor filed?
- Cirrus Logic International Semiconductor has 82 certified H-1B Labor Condition Applications for Design Verification Engineer on record (FY2019–FY2026), 12 of them in FY2026. That is 16% of its 507 certified filings across all titles.
- Does Cirrus Logic International Semiconductor pay Design Verification Engineers above the market?
- Cirrus Logic International Semiconductor's all-years median of $128k is 9% below the $142k median for Design Verification Engineer across all H-1B employers (1,200 certified filings).
- Where does Cirrus Logic International Semiconductor hire H-1B Design Verification Engineers?
- Cirrus Logic International Semiconductor's Design Verification Engineer LCAs name worksites mostly in Texas, Arizona; the top cities are Austin, TX, Chandler, AZ, Mesa, AZ.
- Does a certified LCA mean an H-1B visa was approved?
- No. A Labor Condition Application (LCA) is the Department of Labor attestation an employer must have certified before filing an H-1B petition with USCIS. It records the job, worksite and offered wage, but not whether the petition was filed, selected in the lottery, or approved. Filing counts measure intent to sponsor, not headcount.
- What salary do these figures show?
- The base annual wage offered on the certified LCA, converted to a yearly amount. Bonus, equity, overtime and benefits are not included, so total compensation is typically higher. Figures are medians and percentiles over certified filings; wages above $5,000,000 a year are excluded as data-entry errors.
- What do prevailing-wage levels I–IV mean?
- The Department of Labor assigns each LCA an OES wage level from I (entry) to IV (fully competent) for the occupation and area. Under the FY2027 wage-weighted H-1B lottery rule, a higher level earns more selection entries, so an employer's level mix is a proxy for how senior its sponsored roles are.
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Source: U.S. Department of Labor, Office of Foreign Labor Certification — certified LCA disclosure data through June 2026 (FY2019–FY2026). An LCA is not an approved visa; pay figures are base salary and exclude bonus and equity. Methodology →