Smts Silicon Design Engineer H-1B salary at Xilinx — 46 certified filings (FY2022–FY2026)
- 12
- Filings · FY2025
- $205k
- Median base · FY2025
- $199k–$205k
- Middle 50% · FY2025
- +17%
- vs market median · all years
Xilinx filed 12 certified H-1B LCAs for Smts Silicon Design Engineer in FY2025, with a median base salary of $205k and the middle 50% of offers between $199k and $205k. Across all years its $205k median is 17% above the $176k market median for Smts Silicon Design Engineer. It has filed 46 Smts Silicon Design Engineer LCAs since FY2022, most often in San Jose, CA.
How much does Xilinx pay a Smts Silicon Design Engineer?
Certified base salary for Smts Silicon Design Engineer at Xilinx by fiscal year: each box is the p25–p75 range, the heavy line the median, the whiskers reach p10–p90. $205k median in FY2025. Base pay only — hover a year for its figures.
Does Xilinx pay Smts Silicon Design Engineers above the market?
Xilinx's all-years median against every employer's certified Smts Silicon Design Engineer LCAs — 17% above the market. Same cleaned DOL title, same base-salary definition, so the two rows compare like for like.
| Base salary for this title | Filings | Median |
|---|---|---|
| Xilinx | 46 | $205k |
| All employers · Smts Silicon Design Engineer | 508 | $176k |
How has Xilinx's Smts Silicon Design Engineer hiring changed by year?
7 certified Smts Silicon Design Engineer filings in FY2022 → 4 in FY2026. The change column is each year against the one before.
| Fiscal year | Filings | vs prior FY | Median base |
|---|---|---|---|
| FY2026 | 4 | −67% | $216k |
| FY2025 | 12 | +33% | $205k |
| FY2024 | 9 | −36% | $215k |
| FY2023 | 14 | +100% | $177k |
| FY2022 | 7 | — | $177k |
Which wage levels does Xilinx file for Smts Silicon Design Engineer?
DOL prevailing-wage levels I–IV approximate experience tiers (I = entry, IV = fully competent). 100% of Xilinx's Smts Silicon Design Engineer filings sit at Level III–IV. Higher levels earn more entries in the wage-weighted H-1B lottery.
Share of 41 Smts Silicon Design Engineer filings with a wage level · all years
- Level IV100.0%41
Where does Xilinx hire H-1B Smts Silicon Design Engineers?
Worksite states and cities on the certified filings for this title, all years, with the median base salary at each.
| State | Filings | Median base |
|---|---|---|
| California | 45 | $205k |
| Oregon | 1 | $190k |
| City | Filings | Median base |
|---|---|---|
| San Jose, CA | 44 | $205k |
| Beaverton, OR | 1 | $190k |
| Santa Clara, CA | 1 | $263k |
Also filed as
Xilinx's other sponsored titles, and the employers that file the most Smts Silicon Design Engineer LCAs. All years.
Other titles at Xilinx
| Job title | Filings | Median base |
|---|---|---|
| Senior Design Engineer | 180 | $126k |
| Sr. Silicon Design Engineer | 133 | $137k |
| MTS Silicon Design Engineer | 120 | $176k |
| Senior Software Engineer | 98 | $125k |
| Sr. Software Development Engineer | 94 | $151k |
| Staff Design Engineer | 68 | $158k |
| MTS Software Development Eng. | 65 | $180k |
| Staff Software Engineer | 38 | $152k |
| Silicon Design Engineer | 36 | $130k |
| Design Engineer | 34 | $110k |
Top Smts Silicon Design Engineer sponsors
| Employer | Filings | Median base |
|---|---|---|
| Advanced Micro Devices | 459 | $172k |
| Pensando Systems | 3 | $220k |
Common questions about Smts Silicon Design Engineer H-1B pay at Xilinx
- How much does Xilinx pay a Smts Silicon Design Engineer on an H-1B?
- Xilinx's median certified H-1B base salary for Smts Silicon Design Engineer is $205k in FY2025, from 12 filings; the middle 50% of offers fall between $199k and $205k. Across all years the median is $205k.
- How many Smts Silicon Design Engineer H-1B LCAs has Xilinx filed?
- Xilinx has 46 certified H-1B Labor Condition Applications for Smts Silicon Design Engineer on record (FY2022–FY2026), 4 of them in FY2026. That is 3% of its 1,565 certified filings across all titles.
- Does Xilinx pay Smts Silicon Design Engineers above the market?
- Xilinx's all-years median of $205k is 17% above the $176k median for Smts Silicon Design Engineer across all H-1B employers (508 certified filings).
- Where does Xilinx hire H-1B Smts Silicon Design Engineers?
- Xilinx's Smts Silicon Design Engineer LCAs name worksites mostly in California, Oregon; the top cities are San Jose, CA, Beaverton, OR, Santa Clara, CA.
- Does a certified LCA mean an H-1B visa was approved?
- No. A Labor Condition Application (LCA) is the Department of Labor attestation an employer must have certified before filing an H-1B petition with USCIS. It records the job, worksite and offered wage, but not whether the petition was filed, selected in the lottery, or approved. Filing counts measure intent to sponsor, not headcount.
- What salary do these figures show?
- The base annual wage offered on the certified LCA, converted to a yearly amount. Bonus, equity, overtime and benefits are not included, so total compensation is typically higher. Figures are medians and percentiles over certified filings; wages above $5,000,000 a year are excluded as data-entry errors.
- What do prevailing-wage levels I–IV mean?
- The Department of Labor assigns each LCA an OES wage level from I (entry) to IV (fully competent) for the occupation and area. Under the FY2027 wage-weighted H-1B lottery rule, a higher level earns more selection entries, so an employer's level mix is a proxy for how senior its sponsored roles are.
Keep exploring
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Source: U.S. Department of Labor, Office of Foreign Labor Certification — certified LCA disclosure data through June 2026 (FY2022–FY2026). An LCA is not an approved visa; pay figures are base salary and exclude bonus and equity. Methodology →