Sr. Silicon Design Engineer H-1B salaries — 740 certified filings (FY2019–FY2026)
- 127
- Filings · FY2025
- $141k
- Median base · FY2025
- $113k–$151k
- Middle 50% · FY2025
- Advanced Micro Devices
- Top sponsor · 606 all-time
Sr. Silicon Design Engineer: 740 certified H-1B LCAs since FY2019. In FY2025 the median base salary was $141k across 127 filings, with the middle 50% of offers between $113k and $151k. The biggest sponsors are Advanced Micro Devices, Xilinx, Pensando Systems; most filings are in Austin, TX.
How much does a Sr. Silicon Design Engineer make on an H-1B?
Certified base salary by fiscal year: each box is the p25–p75 range, the heavy line the median, the whiskers reach p10–p90. $141k median in FY2025. Base pay only — hover a year for its figures.
How has Sr. Silicon Design Engineer sponsorship changed?
25 certified filings in FY2019 → 104 in FY2026. The change column is each year against the one before.
| Fiscal year | Filings | vs prior FY | Median base |
|---|---|---|---|
| FY2026 | 104 | −18% | $147k |
| FY2025 | 127 | +2% | $141k |
| FY2024 | 124 | +10% | $127k |
| FY2023 | 113 | +6% | $126k |
| FY2022 | 107 | +55% | $124k |
| FY2021 | 69 | −3% | $117k |
| FY2020 | 71 | +184% | $111k |
| FY2019 | 25 | — | $107k |
Which companies sponsor H-1B Sr. Silicon Design Engineers?
The employers with the most certified filings, all years, with their median base salary. Open any employer for its full profile.
| # | Employer | Filings | Median base |
|---|---|---|---|
| 1 | Advanced Micro Devices | 606 | $124k |
| 2 | Xilinx | 133 | $137k |
| 3 | Pensando Systems | 1 | $175k |
Where are H-1B Sr. Silicon Design Engineer jobs located?
Worksite cities with the most certified filings for this title, all years.
| # | City | Filings | Median base |
|---|---|---|---|
| 1 | Austin, TX | 228 | $111k |
| 2 | Santa Clara, CA | 182 | $138k |
| 3 | San Jose, CA | 117 | $138k |
| 4 | Boxborough, MA | 93 | $111k |
| 5 | Orlando, FL | 47 | $105k |
| 6 | Fort Collins, CO | 23 | $119k |
| 7 | San Diego, CA | 13 | $119k |
| 8 | Bellevue, WA | 7 | $117k |
| 9 | Ft. Collins, CO | 6 | $110k |
| 10 | Folsom, CA | 3 | $140k |
Common questions about Sr. Silicon Design Engineer H-1B salaries
- What is the median H-1B salary for a Sr. Silicon Design Engineer?
- The median certified H-1B base salary for Sr. Silicon Design Engineer is $141k (FY2025), from 127 filings. Across all years the middle 50% earn between $110k and $141k.
- Which companies sponsor the most H-1B Sr. Silicon Design Engineers?
- The top H-1B sponsors for Sr. Silicon Design Engineer are Advanced Micro Devices, Xilinx, Pensando Systems.
- Where are most H-1B Sr. Silicon Design Engineer jobs located?
- The top worksite locations for H-1B Sr. Silicon Design Engineer roles are Austin, TX, Santa Clara, CA, San Jose, CA.
- Does a certified LCA mean Sr. Silicon Design Engineer H-1B visas were approved?
- No. A Labor Condition Application (LCA) is the Department of Labor attestation an employer must have certified before filing an H-1B petition with USCIS. It records the job, worksite and offered wage, but not whether the petition was filed, selected in the lottery, or approved. Filing counts measure intent to sponsor, not headcount.
- What salary do these figures show?
- The base annual wage offered on the certified LCA, converted to a yearly amount. Bonus, equity, overtime and benefits are not included, so total compensation is typically higher. Figures are medians and percentiles over certified filings; wages above $5,000,000 a year are excluded as data-entry errors.
- What does the fiscal year mean here?
- Years are U.S. government fiscal years, October to September: FY2025 runs from October 1, 2024 to September 30, 2025. This matches how the Department of Labor publishes the disclosure files. The most recent year may be partial until its final quarter is released.
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Source: U.S. Department of Labor, Office of Foreign Labor Certification — certified LCA disclosure data through June 2026 (FY2019–FY2026). An LCA is not an approved visa; pay figures are base salary and exclude bonus and equity. Methodology →