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employer matches "Red Digital Cinema" · FY2025

Base salary distribution

Certified filingsMedian pay

Sr Principal Fpga/Asic Design Engineer

$277k

012

Employer	Job Title	Base $	Lvl	Location	Decided

Red Digital Cinema	SR Principal FPGA/ASIC Design Engineer	$277k	IV	Thousand Oaks, CA	2025-04-30	2025-09-30
Red Digital Cinema	SR Principal FPGA/ASIC Design Engineer	$277k	IV	Thousand Oaks, CA	2025-04-22	2025-09-30